NVIDIA Corporation - NVIDIA and TSMC Bring AI Into Fabs to Advance Semiconductor Design and Manufacturing

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NVIDIA Corporation - NVIDIA and TSMC Bring AI Into Fabs to Advance Semiconductor Design and Manufacturing

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NVIDIA and TSMC announced that TSMC is using NVIDIA accelerated computing and AI to advance semiconductor design and manufacturing, with computational lithography, transistor simulation, process control, and wafer inspection now running on NVIDIA's GPU-accelerated infrastructure. As chips move to more advanced nodes, bringing them from design to high-volume production has become one of the world's most complex computing challenges. The collaboration centers on NVIDIA's cuLitho computational lithography library and broader Omniverse digital twin technology. cuLitho accelerates the massively parallel calculations required for optical proximity correction (OPC), which determines how photomask patterns should be drawn to produce the desired patterns on silicon. Traditional OPC runs on CPU clusters and can take weeks per mask set; GPU acceleration with cuLitho cuts runtime by an order of magnitude while reducing power consumption. "TSMC is using NVIDIA technologies to accelerate this transformation, applying accelerated computing across physics simulation, image processing, and other manufacturing workloads," the companies stated. The collaboration also extends to FabTwin, TSMC's virtual replica of its production fabs built on NVIDIA Omniverse, which enables stress-testing process tool layouts and equipment changes before physical implementation. Technically, the architecture combines NVIDIA H100 / Blackwell GPUs for inference and simulation with NVIDIA Omniverse for digital twin visualization and collaboration. cuLitho runs on NVIDIA Hopper GPUs and uses Tensor Core units for the convolution operations that dominate OPC workloads. Omniverse USD-based digital twins enable physics-based simulation of fab operations including material flow, equipment utilization, and contamination control. The platform integrates with TSMC's existing design and manufacturing execution systems (MES). Operationally, TSMC reports 20-50% cost or cycle-time gains across the cuLitho workflows vs CPU-based baselines, with similar gains expected as the technology expands to additional process nodes. The FabTwin virtual fabs reduce physical prototyping cost for new fab designs by enabling validation in simulation before capital expenditure. Future direction per NVIDIA and TSMC: expanding cuLitho to sub-3nm nodes, scaling FabTwin across TSMC's global fab network, and integrating generative AI for automated mask synthesis.